Data flow within an open architecture tester

IEEE International Test Conference (TC)

Volumn , Issue , 2003, Pages 185-190

  Gavardoni, Maurizio ^a  

^a NPTest   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA FLOW ANALYSIS; DATA TRANSFER; INTERFACES (COMPUTER); OPTIMIZATION; SYNCHRONIZATION;

OPEN ARCHITECTURE TESTER;

COMPUTER ARCHITECTURE;

EID: 0142153740     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. H. Hall - W. Hall, High-Speed Digital System Design, Hardcover
2. H. Johnson - M. Graham, High-Speed Digital Design, Hardcover
3. J. Hui, Success By Learning, Mass Market Paperback