A Highly Linear 125-MHz CMOS Switched-Resistor Programmable-Gain Amplifier

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 10, 2003, Pages 1663-1670

  Hsu, Cheng Chung ^a   Wu, Jieh Tsorng ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Distortion; Programmable gain amplifier (PGA); Switched resistor; Variable gain amplifier (VGA)

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; GAIN CONTROL; HARMONIC DISTORTION; MOSFET DEVICES; VARIATIONAL TECHNIQUES;

GAIN AMPLIFIERS;

CMOS INTEGRATED CIRCUITS;

EID: 0141920414     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.817665     Document Type: Article

References (19)

1. J. M. Khoury, "On the design of constant settling time AGC circuits," IEEE Trans. Circuits Syst. II, vol. 45, pp. 283-294, Mar. 1998.
2. N. P. Sands, E. Naviasky, W. Evans, M. Mengele, K. Faison, C. Frost, M. Casas, and M. Williams, "An integrated analog front-end for VDSL," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 1999, pp. 246-247.
3. I. Mehr, D. Paterson, N. Abaskharoun, J. Lloyd, H. L'Bahy, and A. DeSimone, "An integrated mixed-signal front-end for broadband modems, " in Symp. VLSI Circuits Dig. Tech. Papers, 2002, pp. 38-41.
4. I. Mehr, P. C. Maulik, and D. Paterson, "A 12-bit integrated analog front end for broadband wireline networks," IEEE J. Solid-State Circuits, vol. 37, pp. 302-309, Mar. 2002.
5. R. Gomez and A. Abidi, "A 50 MHz CMOS variable gain amplifier for magnetic data storage systems," IEEE J. Solid-State Circuits, vol. 27, pp. 935-939, Dec. 1992.
6. R. Harjani, "A low-power CMOS VGA for 50 Mb/s disk drive read channels," IEEE Trans. Circuits Syst. II, vol. 42, pp. 370-376, June 1995.
7. J. Guido, V. Leung, J. Kenney, J. Trackim, A. Agrillo, E. Zimany, and R. Shariatdoust, "Analog front end IC for category I and II ADSL," in Symp. VLSI Circuits Dig. Tech. Papers, 2000, pp. 178-181.
8. O. Watanabe, S. Otaka, M. Ashida, and T. Itakura, "A 380-MHz CMOS linear-in-dB signal-summing variable gain amplifier with gain compensation techniques for CDMA systems," in Symp. VLSI Circuits Dig. Tech. Papers, 2002, pp. 136-139.
9. P. Orsatti, F. Piazza, and Q. Huang, "A 71-MHz CMOS IF-baseband strip for GSM," IEEE J. Solid-State Circuits, vol. 31, pp. 104-108, Jan. 2000.
10. J. J. F. Rijns, "CMOS low-distortion high-frequency variable-gain amplifier," IEEE J. Solid-State Circuits, vol. 31, pp. 1029-1034, July 1996.
11. S. D. Willingham, K. W. Martin, and A. Ganesan, "A BiCMOS low-distortion 8-MHz low-pass filter," IEEE J. Solid-State Circuits, vol. 28, pp. 1234-1245, Dec. 1993.
12. P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits. New York: Wiley, 2001.
13. pp output in 0.25 μm CMOS," in Symp. VLSI Circuits Dig. Tech. Papers, 2001, pp. 81-82.
14. C.-C. Hsu and J.-T. Wu, "A 125 MHz -86 dB IM3 programmable-gain amplifier," in Symp. VLSI Circuits Dig. Tech. Papers, June 2002, pp. 32-35.
15. U. Moon and B. S. Song, "Design of a low-distortion 22-kHz fifth-order Bessel filter," IEEE J. Solid-State Circuits, vol. 28, pp. 1254-1264, Dec. 1993.
16. P. Wambacq and W. Sansen, Distortion Analysis of Analog Integrated Circuits. Norwell, MA: Kluwer, 1998.
17. Y. Tsividis, Operation and Modeling of the MOS Transistor. New York: McGraw-Hill, 1999.
18. B. K. Ahuja, "An improved frequency compensation technique for CMOS operational amplifiers," IEEE J. Solid-State Circuits, vol. 24, pp. 629-633, Dec. 1983.
19. M. Schtzen, The Volterra and Wiener Theories of Nonlinear Systems. New York: Wiley, 1980.