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Volumn 38, Issue 10, 2003, Pages 1712-1720

An SRAM Design Using Dual Threshold Voltage Transistors and Low-Power Quenchers

Author keywords

CMOS; Dual threshold voltage; Quenchers; SRAM

Indexed keywords

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; MOSFET DEVICES; THRESHOLD VOLTAGE; TRANSISTORS;

EID: 0141920412     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.817254     Document Type: Article
Times cited : (11)

References (14)
  • 6
    • 0030708106 scopus 로고    scopus 로고
    • Suppression of bitline-induced disturbance in SOI DRAM/SRAM cells by bipolar embedded source structure (BESS)
    • June
    • M. Horiuchi, T. Sakata, and S. Kimura, "Suppression of bitline-induced disturbance in SOI DRAM/SRAM cells by bipolar embedded source structure (BESS)," in Symp. VLSI Technology Dig. Tech. Papers, June 1997, pp. 157-158.
    • (1997) Symp. VLSI Technology Dig. Tech. Papers , pp. 157-158
    • Horiuchi, M.1    Sakata, T.2    Kimura, S.3
  • 10
    • 0141979460 scopus 로고    scopus 로고
    • Mitsubishi Electric and Electronics USA, Inc., Cypress, CA
    • M5M5W816TP-70HI data sheet, Mitsubishi Electric and Electronics USA, Inc., Cypress, CA, 1996.
    • (1996) M5M5W816TP-70HI Data Sheet
  • 11
    • 0141944743 scopus 로고    scopus 로고
    • Japan, Online
    • (2001) High-Speed SRAM. Hitachi Ltd., Japan. [Online]. Available: http://www.hitachisemiconductor.com/sic/jsp/japan/eng/products/memory/ sram_high_speed.html
    • (2001) High-speed SRAM
  • 12
    • 0141944742 scopus 로고    scopus 로고
    • Beaverton, OR. Online
    • (2001) IMS 200. Integrated Measurement Systems, Inc, Beaverton, OR. [Online]. Available: http://www.ims.com/html/engineering_test_stations.html
    • (2001) IMS 200


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.