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Volumn , Issue , 1992, Pages 12-16

A new reliable method for delay-fault diagnosis

Author keywords

[No Author keywords available]

Indexed keywords

DELAY CIRCUITS; FAILURE ANALYSIS; VLSI CIRCUITS;

EID: 0141779643     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVD.1992.658014     Document Type: Conference Paper
Times cited : (5)

References (16)
  • 3
    • 0023567773 scopus 로고
    • Efficient test coverage determination for delay faults
    • Sept
    • J.L. Carter, V.S. Iyengar and B.K. Rosen, "Efficient Test Coverage Determination for Delay Faults", Proc. of Int. Test Conf., pp. 418-427, Sept. 1990.
    • (1990) Proc. of Int. Test Conf , pp. 418-427
    • Carter, J.L.1    Iyengar, V.S.2    Rosen, B.K.3
  • 4
    • 0024053829 scopus 로고
    • A method of fault analysis for test generation and fault diagnosis
    • H. Cox and J. Rajski, "A Method of Fault Analysis for Test Generation and Fault Diagnosis", IEEE Trans. Computer-Aided Design, vol. 7, no. 7, pp. 813-833, 1988.
    • (1988) IEEE Trans. Computer-Aided Design , vol.7 , Issue.7 , pp. 813-833
    • Cox, H.1    Rajski, J.2
  • 5
    • 0344059549 scopus 로고
    • An efficient parallel pattern gate delay fault simulator with accelerated detected fault size determination capabilities
    • F. Fink, K. Fuchs and M.H. Schulz, "An Efficient Parallel Pattern Gate Delay Fault Simulator with Accelerated Detected Fault Size Determination Capabilities", Proc. of Euro. Test Conf., pp. 171-180, 1991.
    • (1991) Proc. of Euro. Test Conf. , pp. 171-180
    • Fink, F.1    Fuchs, K.2    Schulz, M.H.3
  • 9
    • 0022915505 scopus 로고
    • Modeling and simulation of delay faults in CMOS logic circuits
    • Sept
    • S. Koeppe, "Modeling and Simulation of Delay Faults in CMOS Logic Circuits", Proc. of Int. Test Conf., pp. 530-536, Sept. 1986.
    • (1986) Proc. of Int. Test Conf. , pp. 530-536
    • Koeppe, S.1
  • 10
    • 0019149817 scopus 로고
    • Test generation for delay faults using stuck-at-fault test Set
    • Nov
    • C. Liaw, Y.H. Su and Y.K. Malaiya, "Test Generation for Delay Faults using Stuck-at-Fault Test Set", Proc. oflnt. Test Conf., pp. 167-175, Nov. 1980.
    • (1980) Proc. Oflnt. Test Conf. , pp. 167-175
    • Liaw, C.1    Su, Y.H.2    Malaiya, Y.K.3
  • 11
    • 0024929725 scopus 로고
    • A simplified six-waveform type method for delay fault testing
    • June
    • W.W. Mao and M.D. Ciletti, "A Simplified Six-Waveform Type Method for Delay Fault Testing", Proc. 26th Design Autom. Conf., pp. 730-733, June 1989.
    • (1989) Proc. 26th Design Autom. Conf. , pp. 730-733
    • Mao, W.W.1    Ciletti, M.D.2
  • 12
    • 0023601226 scopus 로고
    • Robust and nonrobust tests for path delay faults in a combinational circuit
    • Sept
    • E.S. Park and M.R. Mercer, "Robust and Nonrobust Tests for Path Delay Faults in a Combinational Circuit", Proc. of Int. Test Conf., pp. 1027-1034, Sept. 1987.
    • (1987) Proc. of Int. Test Conf , pp. 1027-1034
    • Park, E.S.1    Mercer, M.R.2
  • 14
    • 0022307908 scopus 로고
    • Model for delay faults based upon paths
    • Nov
    • G.L. Smith, "Model for Delay Faults Based upon Paths", Proc. of Int. Test Conf., pp. 342-349, Nov. 1985.
    • (1985) Proc. of Int. Test Conf. , pp. 342-349
    • Smith, G.L.1
  • 15
    • 0022185615 scopus 로고
    • Analysis of timing failures due to random AC defects in VLSI modules
    • June
    • N.N. Tendolkar, "Analysis of Timing Failures due to Random AC Defects in VLSI Modules", Proc. 22th Design Autom. Conf., pp. 709-714, June 1985.
    • (1985) Proc. 22th Design Autom. Conf. , pp. 709-714
    • Tendolkar, N.N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.