A Novel NF3-HDP-CVD Process for STI-Filling in Sub-90nm DRAM and Beyond

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2003, Pages 153-154

  Cha, Yong Won ^a   Rha, Sang Ho ^a   Kim, Won Jin ^a   Na, Kyu Tae ^a   Chung, U In ^a   Moon, Joo Tae ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; ETCHING; SPUTTERING; TRANSISTORS;

SHALLOW TRENCH ISOLATIONS (STI);

DYNAMIC RANDOM ACCESS STORAGE;

CVD PROCESS; FILLING IN; TRANSISTOR CHARACTERISTICS; TRENCH ISOLATION;

EID: 0141761516     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. G.Y. Lee et al., Proc. IITC (1999) p152
2. J.W. Kim et al., Proc. IITC (1998) p274
3. H. M'Saad et al., Proc. of the symp. On VLSI Tech. (2001) p42
4. J.S. Martin et al., Proc. of the symp. On VLSI Tech. (2001) p39