Test Structures for Delay Variability

ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems

Volumn , Issue , 2002, Pages 109-

  Boning, Duane ^a   Panganiban, Joseph ^a   Gonzalez Valentin, Karen ^a   Nassif, Sani ^b   McDowell, Chandler ^b   Gattiker, Anne ^b   Liu, Frank ^b  

^a Massachusetts Institute of Technology Cambridge   (United States)

^b IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FORMAL LOGIC; MICROPROCESSOR CHIPS; NETWORKS (CIRCUITS);

TEST STRUCTURES;

LARGE SCALE SYSTEMS;

EID: 0141761409     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/589434.589435     Document Type: Conference Paper

References (0)