Process latitude extension in low k1 DRAM lithography using specific layer oriented illumination design

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5040 III, Issue , 2003, Pages 1304-1309

  Kang, Young Seog ^a   Nam, Dong Seok ^a   Hwang, Chan ^a   Woo, Sang Gyun ^a   Cho, Han Ku ^a   Han, Woo Sung ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

DRAM; Illumination; RET

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER SIMULATION; DYNAMIC RANDOM ACCESS STORAGE; FOURIER TRANSFORMS; MONTE CARLO METHODS; OPTICAL RESOLVING POWER; OPTIMIZATION; PHOTORESISTS;

ILLUMINIZATION OPTIMIZATION; PROCESS LATITUDE EXTENSION; RESOLUTION ENHANCEMENT TECHNIQUES; SPECIFIC LAYER ORIENTED ILLUMINATION DESIGN;

PHOTOLITHOGRAPHY;

EID: 0141610108     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.485384     Document Type: Conference Paper

References (4)

1. 1 lithography: A diffractive approach," Proc. SPIE, vol. 4346, pp. 1436-1442, 2001.
2. K. Tounai, H. Tanabe, H. Nozue, K. Kasama, "Resolution improvement with annular illumination," Proc. SPIE, Vol. 1674, p. 753, 1992.
3. D. Nam, J. Lee, C. Kim, S. Choi, H. Kang, and J. Moon, "Lithography of 180nm design rule for 1 Gbit DRAM," Proc. SPIE, Vol. 3334, p.117, 1998.
4. Alfred Kwok-Kit Wong, Resolution Enhancement Techniques in Optical Lithography, Tutorial texts in optical engineering; v. TT47, p81, SPIE Press, 2001