Advanced 300mm Cu/CVD LK (k=2.2) Multilevel Damascene Integration for 90/65nm Generation BEOL Interconnect Technologies

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2003, Pages 105-106

  Li, L P ^a   Lu, Y C ^a   Lu, H H ^a   Yang, Y L ^a   Lin, C H ^a   Lin, K C ^a   Chen, B T ^a   Liang, M ^a   Jang, S M ^a   Liang, M S ^a  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CHEMICAL MECHANICAL POLISHING; FOURIER TRANSFORM INFRARED SPECTROSCOPY; PERMITTIVITY; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; STATIC RANDOM ACCESS STORAGE; THERMODYNAMIC STABILITY; TRANSMISSION ELECTRON MICROSCOPY; VLSI CIRCUITS; COPPER; ETCHING; INTEGRATED CIRCUIT INTERCONNECTS; INTEGRATION;

INTERCONNECT TECHNOLOGIES;

LARGE SCALE SYSTEMS; LOW-K DIELECTRIC;

300MM WAFER; 65NM GENERATION; DAMASCENE INTEGRATION; HIGH- K; INTERCONNECT TECHNOLOGY; INTERMETAL DIELECTRIC; LOW- K DIELECTRICS; METAL LEVELS; METAL-DIELECTRIC FILMS; MULTILEVELS;

EID: 0141538315     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. S.M. Jang et al., Symp. on VLSI Tech., pp 18 (2002)
2. E.T. Ogawa et al., IRPS, pp 312 (2002)
3. T.I. Bao et al., Tech. Dig. of IEDM, pp 583 (2002)
4. L.J. Li et al., AMC Tech. Symp., pp 261 (2002)