Employing step and flash imprint lithography for gate level patterning of a MOSFET device

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5037 II, Issue , 2003, Pages 1029-1034

  Smith, B J ^a   Stacey, N A ^a   Donnelly, J P ^a   Onsongo, D M ^a   Bailey, T C ^a   Mackay, C J ^b   Resnick, D J ^c   Dauksher, W J ^c   Mancini, D ^c   Nordquist, K J ^c   Sreenivasan, S V ^b   Banerjee, S K ^a   Ekerdt, J G ^a   Willson, C G ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b MOLECULAR IMPRINTS INC   (United States)

^c MOTOROLA INC   (United States)

Author keywords

Alignment; Etching; MOSFET; Planarization; Step and flash imprint lithography

Indexed keywords

ARRAYS; CROSSLINKING; ETCHING; MOSFET DEVICES; ULTRAVIOLET RADIATION;

GATE LEVEL PATTERNING; MICROPOLARIZER ARRAY; NEXT GENERATION LITHOGRAPHY; STEP AND FLASH IMPRINT LITHOGRAPHY;

LITHOGRAPHY;

EID: 0141501131     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.490142     Document Type: Conference Paper

References (11)

1. M. Colburn et al., Proc. SPIE 3676, 379 (1999).
2. D.J. Resnick et al., Proc. SPIE 4688, 205 (2002).
3. B.J. Choi et al., Proc. SPIE 4342, 436 (2001).
4. D M. Colburn et al., Proc. SPIE 3679, 2965 (2000)
5. D. Wang et al., Appl. Phys. Lett. 70, 1593 (1997).
6. J. Haisma et al., J. Vac. Sci. Technol. B 14, 4124 (1996)
7. S.Y. Chou, P.R. Krauss, & P.J. Renstrom, J. Vac. Sci. Tech. B 14, 4129 (1996)
8. T.K. Widden et al., Nanotechnology. 7, 447 (1996)
9. Y. Xia & G.M. Whitesides, Angew. Chem. Int. Ed. Engl. 37, 550 (1998)
10. Bailey, T.C., et al., J. Photopolymer Sci. Tech., 15(3): p. 481 (2002)
11. Choi, B.J., et al., Proc., DETC2000, MECH-14145, 861, (2000)