Numerical analysis of substrate effect on turn-on characteristics of GaAs MESFET

Electronics Letters

Volumn 35, Issue 4, 1999, Pages 343-344

  Horio, K ^a  

^a SHIBAURA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0043130306     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990198     Document Type: Article

References (6)

1. YEAT, R., D'AVANZO, D.C., CHAN, K., FERNANDEZ, N., TAYLOR, T.W., and VOGEL, C.: 'Gate slow transients in GaAs MESFETs - causes, cures, and impact on circuits'. IEDM Tech. Dig., 1988, pp. 842-845
2. KOHNO, Y., MATSUBAYASHI, H., KOMARU, M., TAKANO, H., ISHIHARA, O., and MITSUI, S.: 'Modeling and suppression of the surface trap effect on drain current frequency dispersions in GaAs MESFETs'. Proc. GaAs IC Symp., 1994, pp. 263-266
3. LO, S.H., and LEE, C.P.: 'Analysis of surface state effect on gate lag phenomena in GaAs MESFETs', IEEE Trans., 1994, ED-41, pp. 1504-1512
4. HORIO, K., and YAMADA, T.: 'Two-dimensional analysis of surface-state effects on turn-on characteristics in GaAs MESFETs', IEEE Trans., 1999, ED-46,
5. HORIO, K., and FUSEYA, Y.: 'Two-dimensional simulation of drain-current transients in GaAs MESFETs with semi-insulating substrate compensated by deep levels', IEEE Trans., 1994, ED-41, pp. 1340-1346
6. HORIO, K., YANAI, H., and IKOMA, T.: 'Numerical simulation of GaAs MESFETs on the semi-insulating substrate compensated by deep traps', IEEE Trans., 1988, 35, pp. 1778-1785