메뉴 건너뛰기




Volumn , Issue , 2003, Pages 88-91

A unified hot carrier degradation model for integrated lateral and vertical nDMOS transistors

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRON MOBILITY; ELECTRON TRAPS; HOT CARRIERS;

EID: 0042941432     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (20)

References (5)
  • 1
    • 84886448038 scopus 로고    scopus 로고
    • 16-60 V rated LDMOS show advanced performance in an 0.72 μm evolution BiCMOS power technology
    • C.Y. Tsai et al., "16-60V Rated LDMOS Show Advanced Performance in an 0.72 μm Evolution BiCMOS Power Technology", Proceedings of the International Electron Devices Meeting IEDM, (1997), pp367-370.
    • (1997) Proceedings of the International Electron Devices Meeting IEDM , pp. 367-370
    • Tsai, C.Y.1
  • 5
    • 0035278429 scopus 로고    scopus 로고
    • A new degradation model and lifetime extrapolation technique for LDD nMOSFETs under hot-carrier degradation
    • R. Dreesen et al., "A New Degradation Model and Lifetime Extrapolation Technique for LDD nMOSFETs under Hot-Carrier Degradation", Microelectronics Reliability, 41, (2001), pp437-445.
    • (2001) Microelectronics Reliability , vol.41 , pp. 437-445
    • Dreesen, R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.