Gbit/s lossless data compression hardware

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 11, Issue 3, 2003, Pages 499-510

  Núñez, José Luis ^a   Jones, Simon ^b  

^a LOUGHBOROUGH UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF BATH   (United Kingdom)

Author keywords

Data compression; Field programmable gate arrays (FPGAs); Lossless circuits

Indexed keywords

ALGORITHMS; ASSOCIATIVE STORAGE; CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; COMPUTER SIMULATION; DATA COMPRESSION; INTEGRATED CIRCUIT LAYOUT; SILICON ON INSULATOR TECHNOLOGY; STATISTICAL METHODS;

LOSSLESS CIRCUITS; REPROGRAMMABLE FIELD PROGRAMMABLE GATE ARRAY;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0042921355     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2003.812288     Document Type: Article

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