Polychrony* for system design

Journal of Circuits, Systems and Computers

Volumn 12, Issue 3, 2003, Pages 261-303

  Le Guernic, Paul ^a   Talpin, Jean Pierre ^a   Le Lann, Jean Christophe ^a  

^a CAMPUS DE BEAULIEU   (France)

Author keywords

Formal methods; Refinement based system level design; Synchrony and asynchrony

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER PROGRAMMING LANGUAGES; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; INTELLECTUAL PROPERTY; INTERFACES (COMPUTER); MATHEMATICAL MODELS; PROGRAM COMPILERS; TIMING CIRCUITS;

POLYCHRONY; SYNCHRONOUS CIRCUITS;

SYSTEMS ANALYSIS;

EID: 0042882274     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218126603000763     Document Type: Article

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