A programmable prescaler for minimizing counting errors with PC-based data acquisition cards

Review of Scientific Instruments

Volumn 69, Issue 4, 1998, Pages 1909-1913

  McCabe, P R ^a   Utz, A L ^a  

^a TUFTS UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0042829709     PISSN: 00346748     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1148863     Document Type: Article

References (15)

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4. Many of these boards, including the Computer Boards Inc. CIO-CTR05, which we own, and the Keithley-Metrabyte CTM-05/A, are based on the AMD-9513 counter/timer chip, which imposes the 7 MHz frequency limit.
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13. Our circuit generates one output pulse for every n input pulses, where n is defined as the prescale factor. Thus, when the prescale factor is "1", input pulses are sent directly to the output pulse shaping circuit.
14. J. H. Moore, C. C. Davis, and M. A. Coplan, Building Scientific Apparatus, 2nd ed. (Addison Wesley, Reading, MA, 1989).
15. Figure 2 illustrates that for all average event frequencies considered, a divide-by-eight prescaler will record over 99% of the events. We have verified this assumption experimentally by making an independent measurement that compares the event frequency recorded by our prescaler/ counter with that recorded by a 500 MHz counter (HP 5345A).