On choosing test criteria for behavioral level hardware design verification

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn 2000-January, Issue , 2000, Pages 124-130

  Von Mayhauser, A ^a   Chen, T ^b   Kok, J ^b   Anderson, C ^a   Read, A ^a   Haijar, A ^b  

^a Colorado State University   (United States)

^b Engineering Research Center and Hydraulics Laboratory   (United States)

Author keywords

Computer science; Design engineering; Hardware design languages; Power system modeling; Process design; Software design; Software testing; Standardization; System testing; Very large scale integration

Indexed keywords

COMPUTER HARDWARE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SCIENCE; HARDWARE; INTEGRATION TESTING; MODELING LANGUAGES; PROCESS DESIGN; SOFTWARE TESTING; STANDARDIZATION; VLSI CIRCUITS;

DESIGN ENGINEERING; EVALUATION CRITERIA; HARDWARE DESIGN LANGUAGE; POTENTIAL VALUES; POWER SYSTEM MODEL; SOFTWARE TESTING TECHNIQUES; SYSTEM TESTING; THEORETICAL POINTS;

SOFTWARE DESIGN;

EID: 0042781872     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2000.889572     Document Type: Conference Paper

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