A VLSI structure for X(mod m) operation

Journal of VLSI Signal Processing

Volumn 1, Issue 4, 1990, Pages 257-264

  Alia, Giuseppe ^a   Martinelli, Enrico ^b  

^a UNIVERSITY OF PISA   (Italy)

^b CNR   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0042757293     PISSN: 09225773     EISSN: 1573109X     Source Type: Journal    
DOI: 10.1007/BF00929920     Document Type: Article

References (21)

1. The use of residue number systems in the design of finite impulse response digital filters
2. A high-speed low cost recursive digital filter using residue number arithmetic
3. Techniques for residue-to-analog conversion for residue-encoded digital filters
4. A highly efficient residue-combinatorial architecture for digital filters
5. Implementation of FFT structures using the residue number system
6. Implementation of a fast digital processor using the residue number system
7. A VLSI model for residue number system architecture
8. A fast VLSI conversion between binary and residue systems
9. A VLSI algorithm for direct and reverse conversion from weighted binary number system to residue number system
10. VLSI design with multiple active layers
11. A VLSI residue arithmetic multiplier
12. A fast near optimum VLSI implementation of FFT using residue number systems
13. Residue number scaling and other operations using ROM arrays
14. An autoscaler residue multiplier
15. Area-time optimal VLSI integer multiplier with minimum computation time
16. The area-time complexity of binary multiplication
17. A regular layout for parallel adders