Evolvable hardware for generalized neural networks

IJCAI International Joint Conference on Artificial Intelligence

Volumn 2, Issue , 1997, Pages 1146-1151

  Murakawa, Masahiro ^a   Yoshizawa, Shuji ^a   Kajitani, Isamu ^b   Higuchi, Tetsuya ^c  

^a UNIVERSITY OF TOKYO   (Japan)

^b UNIVERSITY OF TSUKUBA   (Japan)

^c Eleetrotechinical Laboratory   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE EQUALIZATION; DIGITAL MOBILE COMMUNICATION; EVOLVABLE HARDWARE; GENERALIZED NEURAL NETWORK; HIDDEN LAYER NODES; NEURAL NETWORK HARDWARE; ORDERS OF MAGNITUDE; TIMING CONSTRAINTS;

ELECTRIC NETWORK TOPOLOGY; GENETIC ALGORITHMS; NEURAL NETWORKS; SIGNAL PROCESSING;

HARDWARE;

EID: 0042716982     PISSN: 10450823     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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