Implementation of H.264 decoder on general-purpose processors with media instructions

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5022 I, Issue , 2003, Pages 224-235

  Zhou, Xiaosong ^a   Li, Eric Q ^a   Chen, Yen Kuang ^a,b  

^a INTEL CHINA RESEARCH CENTER   (China)

^b INTEL CORPORATION   (United States)

Author keywords

H.264; Integer transform; MMX SSE SSE2 technologies; Motion compensation; SIMD

Indexed keywords

COMPUTER SOFTWARE; COSINE TRANSFORMS; DECODING; FIR FILTERS; IMAGE QUALITY; INTERPOLATION; MOTION COMPENSATION; MOTION ESTIMATION; MULTIMEDIA SYSTEMS; OPTIMIZATION;

H.264 DECODER; INTEGER TRANSFORM; SINGLE INSTRUCTION MULTIPLE DATA;

IMAGE CODING;

EID: 0042627774     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.484746     Document Type: Conference Paper

References (6)

1. ITU-T Rec. H.264 ISO/IEC 14496-10 AVC, Document JVT-D157, 4th Meeting: Klagenfurt, Austria, July 2002.
2. International Standard Organization, "Information Technology-Coding of Audio-Visual Objects, Part2-Visual", ISO/IEC 14496-2.
3. Intel Corp., Intel® Pentium®4 Optimization Reference Manual, Order number: 248966.
4. Intel Corp., Intel® IA-32 Intel Architecture Software Developer's Manual Volume 2: Instruction Set Reference, Order number: 245471.
5. Intel Corp., Intel® Vtune™ Performance Analyzer
6. H. Malvar, A. Hallapuro, M. Karczewicz, and L. Kerofsky, "Low-Complexity Transform and Quantization with 16-Bit Arithmetic for H.26L," Int'l Conf. on Image Processing, vol. 2, pp. 489-492, Oct. 2002.