-
4
-
-
0042697630
-
Implementation of RSA cryptoprocessor based on montgomery algorithm
-
Jan.
-
D. Yuliang, M. Zhigang, W. Tao, "Implementation of RSA Cryptoprocessor based on Montgomery Algorithm," IEEE International Solid-State Circuits Conference, pp. 254-256, Jan. 1998.
-
(1998)
IEEE International Solid-state Circuits Conference
, pp. 254-256
-
-
Yuliang, D.1
Zhigang, M.2
Tao, W.3
-
5
-
-
0035505389
-
An energy-efficient reconfigurable public-key cryptography processor
-
Nov.
-
J. Goodman, A. Chandrakasan, "An Energy-Efficient Reconfigurable Public-Key Cryptography Processor," IEEE Journal of Solid-State Circuits, vol. 36, no. 11, pp. 1808-1820, Nov. 2001.
-
(2001)
IEEE Journal of Solid-state Circuits
, vol.36
, Issue.11
, pp. 1808-1820
-
-
Goodman, J.1
Chandrakasan, A.2
-
6
-
-
0035720875
-
A 1024-bit RSA crypto-coprocessor for smart cards
-
Sept.
-
L. Shuguo, Z. Runde, G. Yuanging, "A 1024-bit RSA Crypto-Coprocessor for Smart Cards," IEEE International Conference on ASICs, pp. 352-355, Sept. 2001.
-
(2001)
IEEE International Conference on ASICs
, pp. 352-355
-
-
Shuguo, L.1
Runde, Z.2
Yuanging, G.3
-
8
-
-
84939573910
-
Differential power analysis
-
Springer-Verlag
-
P. Kocher, J. Ja, B. Jun, "Differential Power Analysis," CRYPTO 99: Advances in Cryptology, Springer-Verlag, pp. 388-397, 1999.
-
(1999)
CRYPTO 99: Advances in Cryptology
, pp. 388-397
-
-
Kocher, P.1
Ja, J.2
Jun, B.3
-
10
-
-
0035275354
-
Secure contactless smart card ASIC with DPA protection
-
March
-
P. Rakers, L. Connell, T. Collins, D. Russel, "Secure Contactless Smart Card ASIC with DPA Protection," IEEE Journal of Solid-State Circuits, vol. 36, no.3, pp. 559-565, March 2001.
-
(2001)
IEEE Journal of Solid-state Circuits
, vol.36
, Issue.3
, pp. 559-565
-
-
Rakers, P.1
Connell, L.2
Collins, T.3
Russel, D.4
-
11
-
-
0036566408
-
Examining smart-card security under the thread of power analysis attacks
-
T. Messerges, E. Dabbish, R. Sloan, "Examining Smart-Card security under the thread of power analysis attacks," IEEE Transactions on Computers, Vol. 51, no. 5, pp. 541-552, 2002.
-
(2002)
IEEE Transactions on Computers
, vol.51
, Issue.5
, pp. 541-552
-
-
Messerges, T.1
Dabbish, E.2
Sloan, R.3
-
12
-
-
0038114254
-
Improving smart card security using self-timed circuit technology
-
S. Moore, R. Anderson, M. Kuhn, "Improving Smart Card Security using Self-Timed Circuit Technology," IEEE International Symposium on Ansychnronous Circuits and Systems, pp. 120-126, 2002.
-
(2002)
IEEE International Symposium on Ansychnronous Circuits and Systems
, pp. 120-126
-
-
Moore, S.1
Anderson, R.2
Kuhn, M.3
-
13
-
-
84893793732
-
Masking the energy behavior of DES encryption
-
H. Saputra, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, R. Brooks, S. Kim, W. Zhang, "Masking the Energy Behavior of DES Encryption," DATE-03: IEEE Design Automation and Test in Europe, pp. 84-89, 2003.
-
(2003)
DATE-03: IEEE Design Automation and Test in Europe
, pp. 84-89
-
-
Saputra, H.1
Vijaykrishnan, N.2
Kandemir, M.3
Irwin, M.J.4
Brooks, R.5
Kim, S.6
Zhang, W.7
-
14
-
-
84943632039
-
Timing attacks on implementations of diffie-hellman, RSA, DSS and other systems
-
Springer-Verlag
-
P. Kocher, "Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS and Other Systems," CRYPTO-96: Advances in Cryptology, Springer-Verlag, pp. 104-113, 1996.
-
(1996)
CRYPTO-96: Advances in Cryptology
, pp. 104-113
-
-
Kocher, P.1
-
15
-
-
84957079591
-
Towards sound approaches to counteract power-analysis attacks
-
Springer-Verlag
-
S. Chari, C. Jutla, J. Rao, P. Rohatgi, "Towards Sound Approaches to Counteract Power-Analysis Attacks," CRYPTO-99: Advances in Cryptology, Springer-Verlag, pp. 398-412, 1999.
-
(1999)
CRYPTO-99: Advances in Cryptology
, pp. 398-412
-
-
Chari, S.1
Jutla, C.2
Rao, J.3
Rohatgi, P.4
-
16
-
-
0035481641
-
Power analysis attacks and algorithmic approaches to their countermeasures for Koblitz curve cryptosystems
-
Oct.
-
M. Hasan, "Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems," IEEE Transactions on Computers, Vol. 50, no. 10, pp. 1071-1083, Oct. 2001.
-
(2001)
IEEE Transactions on Computers
, vol.50
, Issue.10
, pp. 1071-1083
-
-
Hasan, M.1
-
18
-
-
0028727716
-
Precomputation-based sequential logic optimization for low power
-
Dec.
-
M. Alidina, J. Monteiro, S. Devadas, A. Ghosh, M. Papaefthymiou, "Precomputation-based Sequential Logic Optimization for Low Power," IEEE Transactions on VLSI Systems, Vol. 2, no. 4, pp. 426-436, Dec. 1994.
-
(1994)
IEEE Transactions on VLSI Systems
, vol.2
, Issue.4
, pp. 426-436
-
-
Alidina, M.1
Monteiro, J.2
Devadas, S.3
Ghosh, A.4
Papaefthymiou, M.5
-
19
-
-
0032183716
-
Guarded evaluation: Pushing power management to logic synthesis/design
-
Oct.
-
V. Tiwari, S. Malik, P. Ashar, "Guarded Evaluation: Pushing Power Management to Logic Synthesis/Design," IEEE Transactions on CAD, Vol. 17, no. 10, pp. 1051-1060, Oct. 1998.
-
(1998)
IEEE Transactions on CAD
, vol.17
, Issue.10
, pp. 1051-1060
-
-
Tiwari, V.1
Malik, S.2
Ashar, P.3
-
20
-
-
0035441677
-
Synthesis of power-managed sequential components based on computational Kernel extraction
-
Sep.
-
L. Benini, G. De Micheli, A. Lioy, E. Macii, G. Odasso, M. Poncino, "Synthesis of Power-Managed Sequential Components Based on Computational Kernel Extraction,", IEEE Transactions on CAD, Vol. 20, no. 9, pp. 1118-113, Sep. 2001.
-
(2001)
IEEE Transactions on CAD
, vol.20
, Issue.9
, pp. 1118-1113
-
-
Benini, L.1
De Micheli, G.2
Lioy, A.3
Macii, E.4
Odasso, G.5
Poncino, M.6
-
21
-
-
22844453908
-
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers
-
Oct.
-
L. Benini, G. De Micheli, E. Macii, M. Poncino, R. Scarsi, "Symbolic Synthesis of Clock-Gating Logic for Power Optimization of Synchronous Controllers," ACM Transactions on Design Automation of Electronic Systems, Vol. 4, No. 4, pp. 351-375, Oct. 1999.
-
(1999)
ACM Transactions on Design Automation of Electronic Systems
, vol.4
, Issue.4
, pp. 351-375
-
-
Benini, L.1
De Micheli, G.2
Macii, E.3
Poncino, M.4
Scarsi, R.5
-
22
-
-
0032681025
-
Common-case computation: A high-level technique for power and performance optimization
-
June
-
G. Lakshminarayana, A. Raghunathan, K. S. Khouri, N. K. Jha, S. Dey, "Common-Case Computation: A High-Level Technique for Power and Performance Optimization," DAC-36: ACM/IEEE Design Automation Conference, pp. 56-61, June 1999.
-
(1999)
DAC-36: ACM/IEEE Design Automation Conference
, pp. 56-61
-
-
Lakshminarayana, G.1
Raghunathan, A.2
Khouri, K.S.3
Jha, N.K.4
Dey, S.5
-
24
-
-
84949514743
-
Power analysis attacks of modular exponentiation in smartcards
-
Springer-Verlag
-
T. S. Messerges, E. A. Dabbish, R. H. Sloan, "Power Analysis Attacks of Modular Exponentiation in Smartcards," CHES-99: International Workshop on Cryptographic Hardware and Embedded Systems Springer-Verlag, pp. 144-157, 1999.
-
(1999)
CHES-99: International Workshop on Cryptographic Hardware and Embedded Systems
, pp. 144-157
-
-
Messerges, T.S.1
Dabbish, E.A.2
Sloan, R.H.3
|