Dead-time compensation in the zero-crossing current region

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn 4, Issue , 2003, Pages 1937-1942

  Oliveira, A C ^a,b   Jacobina, C B ^a   Lima, A M N ^a   Da Silva, E R C ^a  

^a FEDERAL UNIVERSITY OF CAMPINA GRANDE   (Brazil)

^b FEDERAL INSTITUTE OF EDUCATION   (Brazil)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC POTENTIAL; SWITCHES;

ZERO-CROSSING CURRENT REGION;

ELECTRIC INVERTERS;

EID: 0042155708     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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8. C. Attaianese, D. Capraro, and G. Tomasso. Hardware dead time compensation for VSI based electrical drives. In Proc. Conf. Rec. of the IEEE International Symposium on Industrial Electronics, pages 759 - 764, Pusan, South Korea, 2001.
9. J.S. Choi, J.Y. Yoo, S.W. Lim, and Y.S. Kim. A novel dead time minimization algorithm of the PWM inverter. In Proc. Conf. Rec. of the IEEE Industry Applications Conference, pages 2188 - 2193, Phoenix, AZ, USA, 1999.
10. L. Ben-Brahim. The analysis and compensation of dead-time effects in three phase PWM inverters. In Proceedings of the 24th Annual Conference of the IEEE Industrial Electronics Society. IECON '98, pages 792 - 797, Aachen, Germany, 1998.