|
Volumn 2, Issue , 2003, Pages 691-694
|
Demonstration of on-chip appended power amplifier for improved efficiency at low power region
a b b a |
Author keywords
[No Author keywords available]
|
Indexed keywords
HETEROJUNCTION BIPOLAR TRANSISTORS;
SEMICONDUCTING GALLIUM ARSENIDE;
SEMICONDUCTING INDIUM COMPOUNDS;
TOPOLOGY;
TRANSISTORS;
IMPEDANCE TRANSFORMING NETWORK;
POWER AMPLIFIERS;
|
EID: 0042093615
PISSN: 0149645X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (9)
|
References (6)
|