1.7kV NPT V-groove clustered IGBT - Fabrication and experimental demonstration

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 2003, Pages 345-348

  Spulber, O ^a   Sweet, M ^a   Vershinin, K ^a   Luther King, N ^a   Sankara Narayanan, E M ^a   De Souza, M M ^a   Flores, D ^b   Millan, J ^b  

^a DE MONTFORT UNIVERSITY   (United Kingdom)

^b INSTITUTO DE MICROELECTRÓNICA DE BARCELONA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ETCHING; GATES (TRANSISTOR); SHORT CIRCUIT CURRENTS; THYRISTORS;

INSULATED GATE BIPOLAR TRANSISTOR (IGBT);

BIPOLAR TRANSISTORS;

EID: 0042014501     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. K. V. Vershinin, M. Sweet, O. Spulber, L. Ngwendson, M. M. De Souza, E. M. Sankara Narayanan, "Clustered Insulated Gate Bipolar Transistor", in Proceedings of the 26th PCIM Conference, 2001
2. O. Spulber, M. Sweet, K. Vershinin, N. Luther-King, M. M. De Souza, E. M. Sankara-Narayanan, "A Novel, 1.2kV Trench Clustered IGBT with Ultra-High Performance", in Proceedings of the International Symposium on Power Semiconductor Devices and IC-s (ISPSD) 2001, pp. 323-326
3. O. Spulber, M. Sweet, K. Vershinin, C. K. Ngw, L. Ngwendson, J. V. S. C. Bose, M. M. De Souza, E. M. Sankara-Narayanan, "A Novel Trench Clustered Insulated Gate Bipolar Transistor (TCIGBT)", in IEEE Electron Device Letter vol. 21, no. 12 2000, pp. 613-615
4. E. M. Sankara Narayanan, O. Spulber, M. M. De Souza, S. C. Bose, "Clustered IGBT - A New Power Semiconductor Device", in Proceedings of the 10th International Workshop Physics of Semiconductor Devices, (IWPSD) 1999, pp. 1307-1312
5. TSUPREM-4 Two Dimensional Process Simulation Program Version 2002.2, User's Manual, July 2000, Avant! Corporation, TCAD Business Unit, Fremont, CA, USA
6. MEDICI Two-dimensional Device Simulation Program Version 2002.2, User's Manual, July 2000, Avant! Corporation, TCAD Business Unit, Fremont, CA, USA
7. Subhas Chandra Bose J. V., "Novel Edge Termination Techniques in MOS-Controlled Power Devices", PhD Thesis 2001
8. M. M .De Souza, Subhas Chandra Bose J. V., Sankara Narayanan E. M., "A Novel, Area-Efficient Floating Field Limited Edge Termination Technique", in Solid-State Electronics, vol. 44, pp. 1381-1386, 2000