Optimal cell flipping to minimize channel density in VLSI design and pseudo-boolean optimization

Discrete Applied Mathematics

Volumn 90, Issue 1-3, 1999, Pages 69-88

  Boros, Endre ^a   Hammer, Peter L ^a   Minoux, Michel ^b   Rader Jr , David J ^c  

^a RUTGERS UNIVERSITY   (United States)

^b UNIVERSITÉ PIERRE ET MARIE CURIE   (France)

^c ROSE HULMAN INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0041705409     PISSN: 0166218X     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0166-218X(98)00114-0     Document Type: Article

References (7)

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6. C.G. Lekkerkerker, J. Ch. Boland, Representation of a finite graph by a set of intervals on the real line, Fund. Math. 51 (1962) 45-64.
7. A.S. La Paugh, Algorithms for integrated circuit layout: an analytic approach, Ph.D. Thesis, 1980, Dept. Electrical Engineering and Computer Sc., M.I.T., Cambridge, MA, USA.