Low pinch-off voltage amorphous silicon junction field-effect transistor: Experiment and simulation

IEEE Transactions on Electron Devices

Volumn 50, Issue 6, 2003, Pages 1559-1561

  Caputo, D ^a   De Cesare, G ^a   Lemmi, F ^a   Palma, F ^a   Tucci, M ^b  

^a SAPIENZA UNIVERSITY OF ROME   (Italy)

^b UTTP NANO Laboratory   (Italy)

Author keywords

Amorphous materials; JFETs; Plasma CVD; Thin film circuits; Thin fllm transistors

Indexed keywords

AMORPHOUS SILICON; CHEMICAL VAPOR DEPOSITION; COMPUTER SIMULATION; ELECTRIC CONDUCTIVITY; ELECTRIC POTENTIAL; FINITE DIFFERENCE METHOD; GLASS; SUBSTRATES;

PINCH-OFF VOLTAGE;

FIELD EFFECT TRANSISTORS;

EID: 0041663618     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2003.813327     Document Type: Article

References (6)

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