High-performance and area-efficient stacked transformers for RF CMOS integrated circuits

IEEE MTT-S International Microwave Symposium Digest

Volumn 2, Issue , 2003, Pages 967-970

  Fong, Neric ^a   Plouchart, Jean Olivier ^b   Zamdmer, Noah ^c   Kim, Jonghae ^c   Jenkins, Keith ^b   Plett, Calvin ^a   Tarr, Garry ^a  

^a CARLETON UNIVERSITY   (Canada)

^b IBM T J WATSON RESEARCH CENTER   (United States)

^c IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC COILS; ELECTRIC RESISTANCE; ELECTRIC TRANSFORMERS; INSERTION LOSSES; MAGNETIC COUPLINGS; NATURAL FREQUENCIES; SUBSTRATES;

STACKED TRANSFORMERS;

CMOS INTEGRATED CIRCUITS;

EID: 0041591261     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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2. J. Long, "A Low-Voltage 5.1-5.8-GHz Image-Reject Downconverter RF 1C", IEEE JSSC, pp. 1320-1328, Sept. 2000.
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4. H. Sampath, et al, "A Fourth-Generation MIMO-OFDM Broadband Wireless System: Design, Performance, and Field Trail Results," IEEE Communication Magazine, pp. 143-149, Sept. 2002.
5. J. Kim, et al, "High-Performance Three-Dimensional On-chip Inductors in SOI CMOS Technology for Monolithic RF Circuit Applications," submitted to IEEE RFIC Conf., 2003.
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8. N. Zamdmer, J. Plouchart, and J. Kim, "Suitability of Scaled SOI for High-Frequency Analog Circuits," IEEE ESSDERC, Sept. 2002.