A scalable model for silicon spiral inductors

IEEE MTT-S International Microwave Symposium Digest

Volumn 3, Issue , 2003, Pages 2117-2120

  Scuderi, Angelo ^a   Biondi, Tonio ^a   Ragonese, Egidio ^a   Palmisano, Giuseppe ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ACOUSTIC NOISE; ELECTRIC RESISTANCE; SILICON; SUBSTRATES;

SPIRAL INDUCTORS;

ELECTRIC INDUCTORS;

EID: 0041589556     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. C. P. Yue, and S. S. Wong, "On-Chip Spiral Inductors with Fattened Ground Shields for Si-Based RFIC's," IEEE J. Solid State Circuits, vol. 33, no. 5, pp. 743-752, May 1999.
2. J. R. Long, and M. A. Copeland, "The Modeling, Characterization, and Design of Monolitic Inductors for Silicon RF IC's," IEEE J. Solid State Circuits., vol. 32, no. 3, pp. 357-368, March 1997.
3. C. P. Yue, and S. S. Wong, "Physical Modeling of Spiral Inductors on Silicon," IEEE Trans. On Electron Devices., vol. 47, no. 3, pp. 560-568, March 2000.
4. Y. Eo, and W. R. Eisenstadt, "High-Speed VLSI Interconnect Modeling Based on S-Parameter Measurements," IEEE Trans. On Components, Hybrids, and Manufacturing., vol. 16, no. 5, pp. 555-562, August 1993.
5. S. S. Mohan, M. del Mar Hershenson, S. P. Boyd, and T. H. Lee, "Simple Accurate Expression for Planar Spiral Inductances," IEEE J. Solid State Circuits, vol. 34, no. 10, pp. 1419-1424, Oct 1999.