-
1
-
-
0003904982
-
-
New York: Academic Press, ch. 2-4
-
L. Young, Anodic Oxide Films. New York: Academic Press, 1961, vol. 15, ch. 2-4.
-
(1961)
Anodic Oxide Films
, vol.15
-
-
Young, L.1
-
2
-
-
0043280342
-
Thin films of niobium for cryotron ground planes
-
R. E. Joynson, C. A. Neugebauer, and J. R. Rairden, "Thin films of niobium for cryotron ground planes," J. Vac. Sci. Technol., vol. 4, pp. 171-178, 1967.
-
(1967)
J. Vac. Sci. Technol.
, vol.4
, pp. 171-178
-
-
Joynson, R.E.1
Neugebauer, C.A.2
Rairden, J.R.3
-
3
-
-
0000511869
-
Selective niobium anodization process for fabricating Josephson tunnel junctions
-
Aug.
-
H. Kroger, L. N. Smith, and D. W. Julie, "Selective niobium anodization process for fabricating Josephson tunnel junctions," Appl. Phys. Lett., vol. 39, pp. 280-282, Aug. 1981.
-
(1981)
Appl. Phys. Lett.
, vol.39
, pp. 280-282
-
-
Kroger, H.1
Smith, L.N.2
Julie, D.W.3
-
4
-
-
36749108668
-
High quality refractory tunnel junctions utilizing thin aluminum layers
-
March
-
M. Gurvitch, M. A. Washington, and H. A. Huggins, "High quality refractory tunnel junctions utilizing thin aluminum layers," Appl. Phys. Lett., vol. 42, pp. 472-474, March 1983.
-
(1983)
Appl. Phys. Lett.
, vol.42
, pp. 472-474
-
-
Gurvitch, M.1
Washington, M.A.2
Huggins, H.A.3
-
5
-
-
0000261231
-
x-Nb Josephson junction process for 125 mm wafers developed in partnership with Si technology
-
Nov.
-
x-Nb Josephson junction process for 125 mm wafers developed in partnership with Si technology," Appl. Phys. Lett., vol. 59, pp. 2609-2611, Nov. 1991.
-
(1991)
Appl. Phys. Lett.
, vol.59
, pp. 2609-2611
-
-
Kelchen, M.B.1
Pearson, D.2
Kleinsasser, A.W.3
Hu, C.-K.4
Smyth, M.5
Logan, J.6
Stawiasz, K.7
Baran, E.8
Jaso, M.9
Ross, T.10
Petrillo, K.11
Manny, M.12
Basavaiah, S.13
Brodsky, S.14
Kaplan, S.B.15
Gallagher, W.J.16
Bhushan, M.17
-
6
-
-
0029324033
-
x/Nb Josephson junctions using chemical mechanical polishing
-
June
-
x/Nb Josephson junctions using chemical mechanical polishing," IEEE Trans. Appl. Superconduct., vol. 5, pp. 2731-2734, June 1995.
-
(1995)
IEEE Trans. Appl. Superconduct.
, vol.5
, pp. 2731-2734
-
-
Bao, Z.1
Bhushan, M.2
Han, S.3
Lukens, J.E.4
-
8
-
-
0041777108
-
x/Nb Josephson junction
-
Aug.
-
x/Nb Josephson junction," J. Appl. Phys., vol. 64, pp. 1586-1588, Aug. 1988.
-
(1988)
J. Appl. Phys.
, vol.64
, pp. 1586-1588
-
-
Imamura, T.1
Hasuo, S.2
-
9
-
-
0026116641
-
RHEA (Resist-hardened etch and anodization) process for fine- geometry Josephson junction fabrication
-
March
-
L. P. S. Lee, E. R. Arambula, G. Hanaya, C. Dang, R. Sandell, and H. Chan, "RHEA (Resist-hardened etch and anodization) process for fine- geometry Josephson junction fabrication," IEEE Trans. Magn., vol. MAG-27, pp. 3133-3136, March 1991.
-
(1991)
IEEE Trans. Magn.
, vol.MAG-27
, pp. 3133-3136
-
-
Lee, L.P.S.1
Arambula, E.R.2
Hanaya, G.3
Dang, C.4
Sandell, R.5
Chan, H.6
-
10
-
-
0032659522
-
x/Nb integrated circuits using low temperature and low stress ECR PECVD silicon oxide films
-
June
-
x/Nb integrated circuits using low temperature and low stress ECR PECVD silicon oxide films," IEEE Trans. Appl. Superconduct., vol. 9, pp. 3208-3211, June 1999.
-
(1999)
IEEE Trans. Appl. Superconduct.
, vol.9
, pp. 3208-3211
-
-
Meng, X.1
Bhat, A.2
Van Duzer, T.3
-
12
-
-
0032637294
-
x-Al/Nb integrated circuit process
-
June
-
x-Al/Nb integrated circuit process," IEEE Trans. Appl. Superconduct., vol. 9, pp. 3232-3235, June 1999.
-
(1999)
IEEE Trans. Appl. Superconduct.
, vol.9
, pp. 3232-3235
-
-
Bhat, A.1
Meng, X.2
Whiteley, S.3
Jeffery, M.4
Van Duzer, T.5
-
13
-
-
0036732063
-
A hybrid Nb/CMOS integration process for superconducting tunnel junction imaging arrays
-
Sept., to be published
-
A. Wong, X. Meng, and T. Van Duzer, "A hybrid Nb/CMOS integration process for superconducting tunnel junction imaging arrays," IEEE Trans. Appl. Superconduct., vol. 12, Sept. 2002, to be published.
-
(2002)
IEEE Trans. Appl. Superconduct.
, vol.12
-
-
Wong, A.1
Meng, X.2
Van Duzer, T.3
-
14
-
-
0043280340
-
-
submitted for publication
-
Y. J. Feng, X. Meng, S. R. Whiteley, T. Van Duzer, H. Miyakawa, K. Fujiwara, and N. Yoshikawa, Josephson-CMOS Hybrid Memory With Ultra-High-Speed Interface Circuit, submitted for publication.
-
Josephson-CMOS Hybrid Memory With Ultra-high-speed Interface Circuit
-
-
Feng, Y.J.1
Meng, X.2
Whiteley, S.R.3
Van Duzer, T.4
Miyakawa, H.5
Fujiwara, K.6
Yoshikawa, N.7
-
15
-
-
0007474310
-
50 GHz MUX and DEMUX designs with on-chip testing
-
Osaka, Japan, June 19-22
-
L. Zheng, X. Meng, S. Whiteley, and T. Van Duzer, "50 GHz MUX and DEMUX designs with on-chip testing," in Extended Abstracts of ISEC'01, Osaka, Japan, June 19-22, 2001, pp. 27-28.
-
(2001)
Extended Abstracts of ISEC'01
, pp. 27-28
-
-
Zheng, L.1
Meng, X.2
Whiteley, S.3
Van Duzer, T.4
-
16
-
-
0004836860
-
x-Al/Nb Junosephson junctions by anodization profiles
-
Sept.
-
x-Al/Nb Junosephson junctions by anodization profiles," J. Appl. Phys., vol. 66, pp. 2173-2180, Sept. 1989.
-
(1989)
J. Appl. Phys.
, vol.66
, pp. 2173-2180
-
-
Imamura, T.1
Hasuo, S.2
-
17
-
-
0042779137
-
Fabrication technology for a high-density Josephson LSI using an electron cyclotron resonance etching technique and a bias-sputtering planarization
-
Nagoya, Japan, Sept. 18-22
-
H. Numata, S. Nagasawa, M. Koike, and S. Tahara, "Fabrication technology for a high-density Josephson LSI using an electron cyclotron resonance etching technique and a bias-sputtering planarization," in Extended Abstracts of ISEC'95, Nagoya, Japan, Sept. 18-22, 1995, pp. 201-203.
-
(1995)
Extended Abstracts of ISEC'95
, pp. 201-203
-
-
Numata, H.1
Nagasawa, S.2
Koike, M.3
Tahara, S.4
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