A High-Quality Stacked Thermal/LPCVD Gate Oxide Technology for ULSI

IEEE Electron Device Letters

Volumn 14, Issue 2, 1993, Pages 72-73

  Moazzami, Reza ^a   Hu, Chenming ^b  

^a MOTOROLA INC   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0040270001     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.215112     Document Type: Article

References (4)

1. P. K. Roy, R. H. Doklan, E. P. Martin, S. F. Shive, and A. K. Sinha, “Synthesis and characterization of high quality ultrathin gate oxides for VLSI/ULSI circuits,” in IEDM Tech. Dig., 1988, p. 714.
2. E. A. Irene, “Silicon oxidation studies: Some aspects of the initial oxidation regime,” J. Electrochem. Soc., vol. 125, no. 10, p. 1708, Oct. 1978.
3. J. M. Gibson and D. W. Dong, “Direct evidence of 1 nm pores in ‘dry’ thermal SiO 2 from high resolution transmission electron microscopy,” J. Electrochem. Soc., vol. 127, no. 12, p. 2722, Dec. 1980.
4. E. A. Irene, “Thermally prepared SiO 2 films for VLSI,” Semiconductor Int., p. 92, June 1985.