Analysis of the Latch and Breakdown Phenomena in N and P Channel Thin Film SOI MOSFET’s as a Function of Temperature

IEEE Transactions on Electron Devices

Volumn 41, Issue 1, 1994, Pages 109-112

  Balestra, F ^a   Jomaah, J ^a   Ghibaudo, G ^a   Giffard, B ^b   Faynot, O ^b   Auberton Herve, A J ^c  

^a CNRS   (France)

^b CEA LETI   (France)

^c PARC TECHNOLOGIQUE DES FONTAINES   (France)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0039343653     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.259627     Document Type: Article

References (10)

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3. I. M. Hafez, G. Ghibaudo, F. Balestra, “Analysis of the kink effect in MOS transistors,” IEEE Trans. Electron Devices, vol. ED-37, pp. 818-821, 1990.
4. C. E. D. Chen, M. Matloubian, R. Sundaresan, B.-Y. Mao, C. C. Wei, and G. P. Pollack, “Single-transistor latch in SOI MOSFET’s,” IEEE Electron Devices Lett., vol. EDL-9, pp. 636-638, 1988.
5. M. Yoshimi, M. Takahashi, T. Wada, K. Kato, S. Kambayashi, M. Kemmochi, and K. Natori, “Analysis of the drain breakdown mechanism in ultra-thin-film SOI MOSFET’s,” IEEE Trans. Electron Devices, vol. ED-37, pp. 2015-2021, 1990.
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7. J. Gautier and A. J. Auberton-Hervé, “A latch phenomenon in buried N-body SOI NMOSFET’s,” IEEE Electron Devices Lett., vol. EDL-12, pp. 372-374, 1991.
8. F. Balestra, “Analysis of the latch phenomenon in thin film SOI MOSFET’s as a function of temperature,” in Proc. ESSDERC'92 (Leuven, Belgium) Microelectronic Engineering (Elsevier), vol. 19, pp. 811-814, 1992.
9. S. M. Sze, Physics of Semiconductors Devices. Wiley, 1981, pp. 143-144.
10. F. Balestra, L. Audaire, and C. Lucas, “Influence of substrate freeze-out on the characteristics of MOS transistors at very low temperatures,” Solid-St. Electron., vol. 30, pp. 321-327, 1987.