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Volumn 23, Issue 2, 1996, Pages 171-182

A branch and bound procedure to minimize mean absolute lateness on a single processor

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EID: 0038876938     PISSN: 03050548     EISSN: None     Source Type: Journal    
DOI: 10.1016/0305-0548(95)00008-A     Document Type: Article
Times cited : (14)

References (20)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.