Three-level inverter configuration cascading two two-level inverters

IEE Proceedings: Electric Power Applications

Volumn 150, Issue 3, 2003, Pages 245-254

  Somasekhar, V T ^a   Gopakumar, K ^a  

^a INDIAN INSTITUTE OF SCIENCE   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CASCADE CONNECTIONS; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POTENTIAL; POWER SUPPLY CIRCUITS; PULSE WIDTH MODULATION;

DC POWER SUPPLY;

ELECTRIC INVERTERS;

EID: 0038734267     PISSN: 13502352     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-epa:20030259     Document Type: Conference Paper

References (9)

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4. SUH, B.-S., and HYUN, D.-S.: 'A New N-level High Voltage Inversion System', IEEE Trans. Ind. Electron., 1997, 44, (1), pp. 107-115
5. STEMMLER, H., and GUGGENBACH, P.: 'Configurations of high power voltage source inverter drives'. Proceedings of 5th European Conference on Power electronics and applications (EPE), Brighton, UK, 1993, pp. 7-12
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7. LEE, Y.-H., SUH, B.-S., and HYUN, D.-S.: 'A novel PWM scheme for a three level voltage source inverter with GTO thyristors', IEEE Trans. Ind. Appl., 1996, 32, (2)
8. VON JOUANNE, A., DAI, S., and ZHANG, H.: 'A simple method for balancing the DC link voltage of three level inverters'. Proceedings of 32nd Annual Power electronics Specialists Conference (PESC), Vancouver, Canada, 17-21 June 2001, pp. 1341-1345
9. KIM, J.-S., and SUL, S.-K.: 'A Novel Voltage Modulation Technique of the Space Vector PWM'. International Power Engineering Conference, IPEC, Yokohama, 3-7 April 1995, pp. 742-747