Cost-performance wafer thinning technology

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2003, Pages 1463-1467

  Wu, Larry ^a   Chan, Jacky ^a   Hsiao, C S ^a  

^a SILICONWARE PRECISION INDUSTRIES CO LTD   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL POLISHING; COST EFFECTIVENESS; ELECTRONICS PACKAGING; ETCHING; GRINDING (MACHINING); INTEGRATED CIRCUIT MANUFACTURE; PERFORMANCE; QUALITY ASSURANCE;

CHEMICAL ETCHING; MECHANICAL GRINDING; WAFER THINNING TECHNOLOGY; WET POLISHING;

MICROELECTRONIC PROCESSING;

EID: 0038688777     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Sandra Winkler, Advance IC Packaging Markets and Trend 5th Edition, Electronic Trend Publications, Inc. 2002 pp. 3-75/78/87/89, 5-1-4/32-33.
2. Dry polishing technology information from Disco Japan.
3. Wet polishing technology information from Okamoto Japan.
4. Plasma etching technology information from Tru-Si U.S.A
5. Jacky Chan, SPIL, "Polisher by-off report", "Polisher evaluation" and "Polishing analysis report" SPIL internal reports.