A 1.9GHz image-reject front-end with automatic tuning in a 0.15μm CMOS technology

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2003, Pages

  Koroglu, Mustafa H ^a,b   Allen, Phillip E ^b  

^a Mindspeed Technologies   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; ELECTRIC INDUCTORS; MIXER CIRCUITS; MULTIPLYING CIRCUITS; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; SPURIOUS SIGNAL NOISE; TUNING;

AMPLITUDE-LOCKED LOOP; IMAGE-REJECT FRONT-END; LOW NOISE AMPLIFIER;

NOTCH FILTERS;

EID: 0038645364     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Y. P. Tsividis, "Integrated Continuous-Time Filter Design - an Overview," IEEE Journal of Solid-State Circuits, vol. 29, no. 3, pp. 166-176, March 1994.
2. M. D. McDonald, "A 2.5GHz BiCMOS Image-Reject Front-End," ISSCC Digest of Technical Papers, pp. 144-145, Feb. 1993.
3. H. Samavati, H. R. Rategh, and T. H. Lee, "A 5GHz CMOS Wireless LAN Receiver Front End," IEEE Journal of Solid-State Circuits, vol. 35, no. 5, pp. 765-772, May 2000.
4. J. Macedo and M. Copeland, "A 1.9GHz Silicon Receiver with Monolithic Image Filtering," IEEE Journal of Solid-State Circuits, vol. 33, no. 3, pp. 378-386, March 1998.
5. M. A. Copeland, S. P. Voinegescu, D. Marchesan, P. Popescu and M. C. Maliepaard, "5-GHz SiGe HBT Monolithic Radio Transceiver with Tunable Filtering," IEEE Transactions on Microwave Theory and Techniques, vol. 48, no. 2, pp. 170-182, Feb. 2000.