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Volumn 23, Issue 2, 2003, Pages 56-65

Hyperthreading technology in the netburst microarchitecture

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; COMPUTER OPERATING SYSTEMS; COST EFFECTIVENESS; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS;

EID: 0038633602     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2003.1196115     Document Type: Article
Times cited : (111)

References (14)
  • 1
    • 0033722744 scopus 로고    scopus 로고
    • Piranha: A scalable architecture based on single-chip multiprocessing
    • IEEE CS Press
    • L.A. Barroso et al., "Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing," Proc. 27th Ann. Int'l Symp. Computer Architecture (ISCA 00), IEEE CS Press, 2000, pp. 282-293.
    • (2000) Proc. 27th Ann. Int'l Symp. Computer Architecture (ISCA 00) , pp. 282-293
    • Barroso, L.A.1
  • 2
    • 0031235242 scopus 로고    scopus 로고
    • A single-chip multiprocessor
    • Sept.
    • L. Hammond, B. Nayfeh, and K. Olukotun, "A Single-Chip Multiprocessor," Computer, vol. 30, no. 9, Sept. 1997, pp. 79-85.
    • (1997) Computer , vol.30 , Issue.9 , pp. 79-85
    • Hammond, L.1    Nayfeh, B.2    Olukotun, K.3
  • 3
    • 0038059690 scopus 로고    scopus 로고
    • HP's Mako processor
    • Oct.
    • D.J.C. Johnson, "HP's Mako Processor," Microprocessor Forum, Oct. 2001, http:// www.cpus.hp.com/technical.references/mpf_2001.pdf.
    • (2001) Microprocessor Forum
    • Johnson, D.J.C.1
  • 7
    • 0020289466 scopus 로고
    • Architecture and applications of the HEP multiprocessor computer system
    • B.J. Smith, "Architecture and Applications of the HEP Multiprocessor Computer System," Proc. SPIE Real Time Signal Processing IV, 1981, pp. 241-248.
    • (1981) Proc. SPIE Real Time Signal Processing IV , pp. 241-248
    • Smith, B.J.1
  • 10
    • 0029666641 scopus 로고    scopus 로고
    • Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor
    • ACM
    • D. Tullsen et al., "Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor," Proc. 23rd Ann. Int'l Symp. Computer Architecture (ISCA 96), ACM, 1996, pp. 191-202.
    • (1996) Proc. 23rd Ann. Int'l Symp. Computer Architecture (ISCA 96) , pp. 191-202
    • Tullsen, D.1
  • 12
    • 0001087280 scopus 로고    scopus 로고
    • Hyperthreading technology architecture and microarchitecture
    • Feb.
    • D.T. Marr et al., "Hyperthreading Technology Architecture and Microarchitecture," Intel Technology J., vol. 6, no. 1, Feb. 2002, http://www.intel.com/technology/itj/2002/volume06issue01/.
    • (2002) Intel Technology J. , vol.6 , Issue.1
    • Marr, D.T.1
  • 13
    • 0003278283 scopus 로고    scopus 로고
    • The microarchitecture of the pentium 4 processor
    • 1st quarter
    • G. Hinton et al., "The Microarchitecture of the Pentium 4 Processor," Intel Technology J., 1st quarter 2001, http://www.intel.com/ technology/itj/q12001.htm.
    • (2001) Intel Technology J.
    • Hinton, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.