Analysis of erratic bits in flash memories

IEEE Transactions on Device and Materials Reliability

Volumn 1, Issue 4, 2001, Pages 179-184

  Chimenton, Andrea ^a   Pellati, Paolo ^a   Olivo, Piero ^a  

^a UNIVERSITY OF FERRARA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0038545250     PISSN: 15304388     EISSN: 15304388     Source Type: Journal    
DOI: 10.1109/7298.995831     Document Type: Article

References (11)

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2. C. Dunn et al., "Flash EPROM disturb mechanisms," in Proc. Int. Rel. Physics Symp., 1994, p. 299.
3. P. Cappelletti and A. Modelli, "Flash memory reliability," in Flash Memories, P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, Eds. Norwell, MA: Kluwer, 1999, pp. 399-42.
4. P. Pavan, R. Bez, P. Olivo, and E. Zanoni, "Flash memory cells: An overview," Proc. IEEE, vol. 865, pp. 1248-1271, Aug. 1997.
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6. P Pellati and P. Olivo, "Automated test equipment for research on nonvolatile memories," IEEE Trans. Instrum. Measur., to be published.
7. P. S. Ku and D. K. Schröder, "Charges trapped throughout the oxide and their impact on the Fowler-Nordheim current in MOS devices," IEEE Trans. Electron Devices, vol. 41, p. 1669, 1994.
8. J. Lopez-Villanueva, J. Jimenez-Tejada, P. Cartujo, J. Bausells, and J. Carceler, "Analysis of the effects of constant Fowler-Nordheim-tunneling injection with charge trapping inside the potential,"/ Appl. Phys., vol. 70, p. 3712, 1991.
9. R. Kies, T. Egilsson, G. Ghibaudo, and G. Pananakakis, "A method for the assessment of oxide charge density and centroid in metal-oxidesemiconductor structures after uniform gate stress," Appl. Phys. Lett., vol. 68, p. 3790, 1996.
10. A. Bhattacharyya, "Modeling of write/erase and charge retention characteristics of floating gate EEPROM devices," Solid State Electron., vol. 27, pp. 899-906, Oct. 1984.
11. A. Kolodny, S. T. K. Nieh, B. Eitan, and J. Shappir, "Analysis and modeling of floating-gate EEPROM cells," IEEE Trans. Electron Devices, vol. 33, pp. 835-844, June 1986.