Simulation-based evaluation of the ramp-up behavior of waferfabs

IEEE International Symposium on Semiconductor Manufacturing Conference, Proceedings

Volumn , Issue , 2003, Pages 111-117

  Sturm, Roland ^a   Dorner, Johann ^a   Reddig, Kevin ^a   Seidelmann, Joachim ^a  

^a FRAUNHOFER INSTITUTE FOR MANUFACTURING ENGINEERING AND AUTOMATION IPA   (Germany)

Author keywords

Capacity planning; Dispatching; Lot sizing; Ramp up; Simulation

Indexed keywords

COMPUTER SIMULATION; MICROELECTRONIC PROCESSING; MICROELECTRONICS; PERFORMANCE; PLANNING;

CAPACITY PLANNING; DISPATCHING; LOT SIZING; RAMP-UP;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0038519702     PISSN: 1523553X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Haller, M.; Peikert, A.; Thoma, J.: "Cycle Time Management during Production Ramp-up", FAIM 2002, 12th Int. Conference on Flexible Automation and Intelligent Manufacturing, Dresden
2. Fowler, J.; J. Robinson: "Measurement and improvement of manufacturing capacities (MIMAC): Final report", Technical Report 95062861A-TR, SEMATECH, Austin, TX 1995.
3. Kumar Nag, P.: "Yield Forecasting", PhD Dissertation, Carnegie Mellon University, Pittsburgh 1996
4. Keith, C: "Accelerating Time-to-Money for a Semiconductor Wafer Fab Capacity Ramp", MSc Dissertation, MIT Sloan School of Management, 1996
5. Terwiesch, C.; Bohn, R.: "Learning and process improvement during production ramp-up", Int. Journal of Production Economics 70 (2001) 1-19
6. Int. Sematech: "Ramp-Up analysis for semiconductor manufacturers", Technical Report 94122642A-XFR, SEMATECH, Austin, TX 1995.