General iterative heuristics for VLSI multiobjective partitioning

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2003, Pages

  Sait, Sadiq M ^a   El Maleh, Aiman H ^a   Al Abaji, Raslan H ^a  

^a KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS   (Saudi Arabia)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; GENETIC ALGORITHMS; HEURISTIC METHODS; ITERATIVE METHODS;

PARALLEL PROGRAMMING;

VLSI CIRCUITS;

EID: 0038420032     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. Sadiq M. Sait and Habib Youssef. VLSI Physical Design Automation: Theory and Practice. McCraw-Hill Book Company, Europe, 1995.
2. K. Shahookar and P. Mazumder. VLSI Cell Placement Techniques. ACM Computing Surveys, 2(23):143-220, June 1991.
3. M. Pedram. CAD for Low Power: Status and Promising Directions. IEEE International Symposium on VLSI Technology, Systems and Applications, pages 331-336, 1995.
4. A. Ghosh, S. Devadas, K. Keutzer, and J. White. Estimation of Average Switching Activity in Combinational and Sequential Circuits. Design Automation Conference, pages 253-259, 1992.
5. H. Vaishnav and M. Pedram. Delay optimal partitioning targeting low power VLSI circuits. IEEE Trans. on Computer Aided Design, 18(6):298-301, June 1999.
6. R. R. Yager, On Ordered Weighted Averaging Aggregation Operators in Multicriteria Decisionmaking. IEEE Transaction on Systems, MAN, and Cybernetics, 18(1), January 1988.
7. Sadiq M. Sait and Habib Youssef. Iterrative Computer Algorithms with Applications in Engineering: Solving Combinatorial Optimization Problems. IEEE Computer Society Press, California, December 1999.
8. J. P. Cohoon and W. D. Paris. Genetic placement. IEEE Trans. on CAD, pages 956-964, 1987.