Optimal linearity testing of analog-to-digital converters using a linear model

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 50, Issue 3, 2003, Pages 317-327

  Cherubal, Sasikumar ^a   Chatterjee, Abhijit ^b  

^a Ardext Technologies   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Analog to digital converter (ADC) linearity test; Linear model; Statistical modeling

Indexed keywords

CALCULATIONS; COMPUTER SIMULATION; COMPUTER TESTING; DIGITAL VOLTMETERS; ESTIMATION; LINEAR SYSTEMS; PROBABILITY DISTRIBUTIONS; SERVOMECHANISMS; STATISTICAL METHODS;

CODE TRANSITION VOLTAGE; DIFFERENTIAL NONLINEARITY; INTEGRAL NONLINEARITY; OPTIMAL LINEARITY TESTING; SERVO LOOP TECHNIQUE;

ANALOG TO DIGITAL CONVERSION;

EID: 0038343387     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2003.809775     Document Type: Article

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