Mask defect specifications with fail-bit-map analysis

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 4889, Issue 2, 2002, Pages 826-835

  Yamaguchi, Shinji ^a   Yamanaka, Eiji ^a   Morinaga, Hiroyuki ^a   Hashimoto, Kohji ^a   Sakamoto, Takashi ^a   Hamaguchi, Akira ^a   Matsumoto, Satoru ^a   Ikenaga, Osamu ^a   Inoue, Soichi ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

Defect inspection; Defect printability; DRAM; Fail bit map; LSI performance; Programmed defect

Indexed keywords

CRYSTAL DEFECTS; DYNAMIC RANDOM ACCESS STORAGE; GATES (TRANSISTOR); LSI CIRCUITS;

FAIL BIT MAP ANALYSIS;

MASKS;

EID: 0038303123     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.467900     Document Type: Conference Paper

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