A unified model for injection-locked frequency dividers

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 6, 2003, Pages 1015-1027

  Verma, Shwetabh ^a   Rategh, Hamid R ^a   Lee, Thomas H ^a  

^a Stanford University   (United States)

Author keywords

CMOS analog integrated circuits; Frequency dividers; Injection locking; Locking range; Loop bandwidth; Oscillators; Phase noise; Phase locked loops (PLLs)

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; ENERGY UTILIZATION; PHASE LOCKED LOOPS; SPURIOUS SIGNAL NOISE;

ANALOG CIRCUITS;

FREQUENCY DIVIDING CIRCUITS;

EID: 0038042161     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.811975     Document Type: Article

References (12)

1. R. Adler, "A study of locking phenomena in oscillators," Proc. IRE, vol. 34, pp. 351-357, June 1946.
2. R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, "1-GHz and 2.8-GHz injection-locked ring oscillator prescalers," in Symp. VLSI Circuits Dig. Tech. Papers, June 2001, pp. 47-50.
3. H. R. Rategh and T. H. Lee, "Superharmonic injection-locked frequency dividers," IEEE J. Solid-State Circuits, vol. 34, pp. 813-821, June 1999.
4. R. L. Miller, "Fractional-frequency generators utilizing regenerative modulation," Proc. IRE, vol. 27, pp. 446-457, July 1939.
5. A. S. Daryoush, T. Berceli, R. Saedi, P. Herczfeld, and A. Rosen, "Theory of subharmonic synchronization of nonlinear oscillators," in IEEE MTTS Dig., vol. 2, 1989, pp. 735-738.
6. R. G. Harrison, "Theory of regenerative frequency dividers using double-balanced mixers," in IEEE MTT-S Dig., June 1989, pp. 459-462.
7. A. Hajimiri, "Jitter and phase noise in electrical oscillators," Ph.D. dissertation, Stanford Univ., Stanford, CA, Nov. 1998.
8. B. Razavi, "Analysis, modeling and simulation of phase noise in monolithic voltage-controlled oscillators," in Proc. IEEE Custom Integrated Circuits Conf., May 1995, pp. 323-326.
9. T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, U.K.: Cambridge Univ. Press, 1998.
10. H. Wu and A. Hajimiri, "A 19-GHz 0.5-mW0.35-μm CMOS frequency divider with shunt-peaking locking-range enhancement," in IEEE Int. Solid-state Circuits Conf. Dig. Tech. Papers, Jan. 2001, pp. 412-413, 471.
11. P. Yue and S. Wong, "On-chip spiral inductors with patterned ground shields for Si-based RFICs," in Symp. VLSI Circuits Dig. Tech. Papers, June 1997, pp. 85-86.
12. A. S. Sedra and K. C. Smith, Microelectronic Circuits. Oxford, U.K.: Oxford Univ. Press, 1991.