A NEW PARALLEL DSP WITH SHORT-VECTOR MEMORY ARCHITECTURE

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 4, Issue , 1999, Pages 2139-2142

  Fridman, Jose ^a   Anderson, William C ^a  

^a ANALOG DEVICES INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; PARALLEL ARCHITECTURES;

ANALOG DEVICES INC.; ARCHITECTURE-BASED; BRANCH PREDICTION; DSP ARCHITECTURES; EMBEDDED PROCESSORS; GENERAL-PURPOSE COMPUTING; HIGHLY PARALLELS; MEMORY SYSTEMS; PARALLEL DSP; SHORT VECTORS;

MEMORY ARCHITECTURE;

EID: 0038036719     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASSP.1999.758357     Document Type: Conference Paper

References (5)

1. "Buyer's Guide to DSP Processors," Berkeley Design Technology, Inc., 3rd edition. 2107 Dwigth Way, Second Floor, Berkeley, CA, 94704, USA. http://www.bdti.com.
2. M. Levy, "EDN's 1998 DSP-Architecture Directory," EDN Magazine, April 23, 1998. http://www.ednmag.com.
3. J. Hennessy, D. Patterson, Computer Architecture, A Quantitative Appproach, second edition, Morgan Kaufmann Publishers, Inc. 1996.
4. V. Kumar, A. Grama, A. Gupta, G. Karypis, Introduction to Parallel Computing, The Benjamin/Cummings Publishing Company, 1994.
5. D. Moldovan, Parallel Processing: From Applications to Systems, Morgan Kaufmann Publishers, 1993.