Design and stacking of an extremely thin chip-scale package

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2003, Pages 1095-1099

  Yoshida, Akito ^a   Ishibashi, Kazuo ^b  

^a AMKOR TECHNOLOGY   (United States)

^b Nokia Japan   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; ENCAPSULATION; INTEGRATED CIRCUIT LAYOUT; SOLDERING ALLOYS; THREE DIMENSIONAL;

DIGITAL CAMERAS; SOLDER BALLS;

CHIP SCALE PACKAGES;

EID: 0038012414     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Morihiro Kada and Lee Smith, "Advancements in Stacked Chip Scale Packaging Provides System in a Package Functionality for Wireless and Handheld Applications," Pan Pacific Microelectronics Symposium (2000)
2. Akito Yoshida, et al, "An Extremely Thin, BGA Format Chip Scale Package and Stacking," International Conference on Electronics Packaging (2001), pp. 44-47
3. Yuji Yano, et. al, "Three-dimensional Very Thin Stacked Packaging Technology for SiP," IEEE Electronic Components and Technology Conference (2002), pp. 1329-1334.
4. Mitsuru Chino, et. al., "Reliability Improvement of 4-stacked FBGA Package," International Conferece on Electronics Packaging (2002), pp.339-344.
5. Akito Yoshida, Kazuo Ishibashi, et al., "An Extremely Thin, BGA Format Chip-Scale Package and Its Board Level Reliability," Electronic Components and Technology Conference (2002), pp. 1335-1340.