Programmable conductivity of silicon nanowires with side gates by surface charging

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 42, Issue 4 B, 2003, Pages 2422-2425

  Matsukawa, Takashi ^a,b   Kanemaru, Seigo ^a,b   Masahara, Meishoku ^a,b   Nagao, Masayoshi ^a   Tanoue, Hisao ^a   Itoh, Junji ^a,b  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^b JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

Author keywords

Quantum wires; Semiconductor device measurements; Semiconductor memories; Silicon on insulator technology; Surface charging

Indexed keywords

ELECTRIC CONDUCTIVITY; GATES (TRANSISTOR); HYSTERESIS; MICROSCOPIC EXAMINATION; NANOSTRUCTURED MATERIALS; QUANTUM ELECTRONICS; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE;

MAXWELL-STRESS MICROSCOPY; PROGRAMMABLE CONDUCTIVITY; PULSE BIAS; SEMICONDUCTOR DEVICE MEASUREMENTS; SILICON NANOWIRES; SURFACE CHARGING; SURFACE POTENTIAL IMAGING;

SILICON WAFERS;

EID: 0038008799     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.42.2422     Document Type: Article

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