Low power VLSI architecture of Viterbi scorer for HMM-based isolated word recognition

Proceedings - International Symposium on Quality Electronic Design, ISQED

Volumn 2002-January, Issue , 2002, Pages 235-239

  Park, Bok Gue ^a   Cho, Koon Shik ^a   Cho, Jun Dong ^a  

^a Sungkyunkwan University   (South Korea)

Author keywords

Automatic speech recognition; Computer architecture; Energy consumption; Hidden Markov models; Logic devices; Low pass filters; Robustness; Speech recognition; Very large scale integration; Viterbi algorithm

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; ELECTRIC POWER UTILIZATION; ENERGY UTILIZATION; HIDDEN MARKOV MODELS; LOGIC DEVICES; LOW PASS FILTERS; MARKOV PROCESSES; ROBUSTNESS (CONTROL SYSTEMS); SPEECH; VITERBI ALGORITHM; VLSI CIRCUITS; VOCABULARY CONTROL;

ADDITIONAL CONTROL; AUTOMATIC SPEECH RECOGNITION; ISOLATED WORD RECOGNITION; RECOGNITION ACCURACY; REDUCED POWER CONSUMPTION; ROBUST MODELING; VLSI ARCHITECTURES; WORD RECOGNITION;

SPEECH RECOGNITION;

EID: 0037993109     PISSN: 19483287     EISSN: 19483295     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2002.996739     Document Type: Conference Paper

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