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Volumn 3526, Issue , 1998, Pages 2-13

Design and implementation of a high level image processing machine using reconfigurable hardware

Author keywords

Abstract machine; Architectures; Design to fit; FPGA; Image algebra; Image processing

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS; PERSONAL COMPUTERS; VLSI CIRCUITS;

EID: 0037960263     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.327017     Document Type: Conference Paper
Times cited : (1)

References (21)
  • 5
    • 0037879399 scopus 로고    scopus 로고
    • Gigaops Ltd., The G-800 System, 2374 Eunice St. Berkeley, CA 94708
    • Gigaops Ltd., The G-800 System, 2374 Eunice St. Berkeley, CA 94708.
  • 6
    • 0027683976 scopus 로고
    • A programmable image processing system using FPGAs
    • Chan, S C, Ngai, H O and Ho, K L, 'A programmable image processing system using FPGAs', Int Journal of Electronics, Vol 75, No 4, pp 725-730, 1993.
    • (1993) Int Journal of Electronics , vol.75 , Issue.4 , pp. 725-730
    • Chan, S.C.1    Ngai, H.O.2    Ho, K.L.3
  • 8
    • 0041061966 scopus 로고    scopus 로고
    • Design and implementation of a high level image processing machine using reconfigurable hardware
    • PhD Thesis, Department of Computer Science, The Queen's University of Belfast
    • Donachy, P, 'Design and implementation of a high level image processing machine using reconfigurable hardware', PhD Thesis, Department of Computer Science, The Queen's University of Belfast, 1996.
    • (1996)
    • Donachy, P.1
  • 9
    • 0038555627 scopus 로고
    • An abstract machine approach to environments for image interpretation on transputers
    • PhD Thesis, The Queen's University of Belfast
    • Steele, J A, 'An abstract machine approach to environments for image interpretation on transputers', PhD Thesis, The Queen's University of Belfast, 1994.
    • (1994)
    • Steele, J.A.1
  • 10
    • 0025448487 scopus 로고
    • IAL: A parallel image processing programming language
    • June
    • Crookes D, Morrow P J and McParland P J, 'IAL: a parallel image processing programming language', IEE Proceedings, Part I, Vol 137 No. 3, pp 176-182, June 1990.
    • (1990) IEE Proceedings, Part I , vol.137 , Issue.3 , pp. 176-182
    • Crookes, D.1    Morrow, P.J.2    McParland, P.J.3
  • 11
    • 0028397502 scopus 로고
    • A high level language for image processing
    • March
    • Brown T J and Crookes, D, 'A high level language for image processing', Image and Vision Computing, Vol 12 No 2, pp 67-79, March 1994.
    • (1994) Image and Vision Computing , vol.12 , Issue.2 , pp. 67-79
    • Brown, T.J.1    Crookes, D.2
  • 13
    • 0038555626 scopus 로고
    • PDSP16488 single chip convolver with integral line delay
    • Technical report, Plessay Semiconductors Ltd., Cheney Manor, Swindon, Wiltshire SN2 2QW, UK
    • Plessey, PDSP16488 Single Chip Convolver with integral line delay, Technical report, Plessay Semiconductors Ltd., Cheney Manor, Swindon, Wiltshire SN2 2QW, UK, 1988.
    • (1988)
    • Plessey1
  • 14
    • 0037541389 scopus 로고
    • Parameterised convolution filtering in an FPGA
    • W Moore and W Luk (editors), Abington EE&CS Books
    • Shoup, R G, 'Parameterised Convolution Filtering in an FPGA', More FPGAs, W Moore and W Luk (editors), Abington EE&CS Books, pp 274, 1994.
    • (1994) More FPGAs , pp. 274
    • Shoup, R.G.1
  • 16
    • 0027311507 scopus 로고
    • A defect-tolerant systolic array implementation for real-time image processing
    • Hecht, V, Ronner, K and Pirsch, P, 'A defect-tolerant systolic array implementation for real-time image processing', Journal of VLSI signal processing, Vol 5, pp 37-47, 1993.
    • (1993) Journal of VLSI Signal Processing , vol.5 , pp. 37-47
    • Hecht, V.1    Ronner, K.2    Pirsch, P.3
  • 17
    • 0028485282 scopus 로고
    • Hybrid signed-digit number systems: A unified framework for redundant number representations with bounded carry propagation chains
    • August
    • Phatak, D and Koren, I, 'Hybrid signed-digit number systems: A unified framework for redundant number representations with bounded carry propagation chains', IEEE Computer, Vol 43 No 8, pp 880-891, August 1994.
    • (1994) IEEE Computer , vol.43 , Issue.8 , pp. 880-891
    • Phatak, D.1    Koren, I.2
  • 18
    • 0037879394 scopus 로고
    • Design of a high performance IIR digital filter chip
    • May
    • Woods, R. F. and McCanny, J. V., Design of a high performance IIR digital filter chip, IEE Proceedings-E, Vol 139, No 3, pp 195-202, May 1992.
    • (1992) IEE Proceedings-E , vol.139 , Issue.3 , pp. 195-202
    • Woods, R.F.1    McCanny, J.V.2
  • 19
    • 0011213584 scopus 로고
    • Signed digit arithmetic on FPGAs
    • W Moore and W Luk (editors), Abington EE&CS Books
    • Moran, J, Rios, I and Meneses, J, 'Signed Digit Arithmetic on FPGAs', More FPGAs, W Moore and W Luk (editors), Abington EE&CS Books, pp 250, 1994.
    • (1994) More FPGAs , pp. 250
    • Moran, J.1    Rios, I.2    Meneses, J.3
  • 20
    • 0025519548 scopus 로고
    • Fast multiplication without carry-propagate addition
    • Ercegovac, M and Lang, T, 'Fast multiplication without carry-propagate addition', IEEE Computer, Vol 39, No 11, pp 1385-1390, 1990.
    • (1990) IEEE Computer , vol.39 , Issue.11 , pp. 1385-1390
    • Ercegovac, M.1    Lang, T.2
  • 21
    • 0037879388 scopus 로고    scopus 로고
    • An FPGA environment for image processing applications
    • September
    • Alotaibi, K, Crookes, D, Bouridane, A, 'An FPGA environment for image processing applications', Proc. IMVIP-97, Vol 1, pp 171-184, September 1997.
    • (1997) Proc. IMVIP-97 , vol.1 , pp. 171-184
    • Alotaibi, K.1    Crookes, D.2    Bouridane, A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.