On the design and efficient implementation of the Farrow structure

IEEE Signal Processing Letters

Volumn 10, Issue 7, 2003, Pages 189-192

  Pun, Carson K S ^a   Wu, Y C ^a   Chan, S C ^a   Ho, K L ^a  

^a UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

Farrow structure; Fractional delay digital filters; Multiplier block (MB); Sum of powers of two (SOPOT)

Indexed keywords

ALGORITHMS; DIGITAL FILTERS; INFORMATION THEORY; REDUNDANCY;

FARROW STRUCTURE; FRACTIONAL DELAY DIGITAL FILTERS; MULTIPLIER-BLOCK; SUM-OF-POWERS-OF-TWO COEFFICIENTS;

DIGITAL SIGNAL PROCESSING;

EID: 0037934620     PISSN: 10709908     EISSN: None     Source Type: Journal    
DOI: 10.1109/LSP.2003.813681     Document Type: Letter

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