Implementing grayscale morphological operators with a compact ranked order extractor circuit

Proceedings of the IEEE International Workshop on Cellular Neural Networks and their Applications

Volumn 2002-January, Issue , 2002, Pages 646-653

  Poikonen, J ^a   Paasio, A ^a,b  

^a UNIVERSITY OF TURKU   (Finland)

^b AALTO UNIVERSITY   (Finland)

Author keywords

Cellular neural networks; Circuits; Data mining; Filters; Gray scale; Hardware; Image processing; Image reconstruction; Morphological operations; Morphology

Indexed keywords

CELLULAR NEURAL NETWORKS; CMOS INTEGRATED CIRCUITS; COMPLEX NETWORKS; COMPUTER HARDWARE; DATA MINING; FILTERS (FOR FLUIDS); FILTRATION; HARDWARE; IMAGE RECONSTRUCTION; MATHEMATICAL MORPHOLOGY; MORPHOLOGY; NETWORKS (CIRCUITS);

CIRCUIT REALIZATION; DIGITAL CMOS TECHNOLOGY; EXTRACTOR CIRCUITS; GRAY SCALE; MASSIVELY PARALLEL PROCESSORS; MORPHOLOGICAL OPERATIONS; MORPHOLOGICAL OPERATOR; RANKED ORDER FILTER;

IMAGE PROCESSING;

EID: 0037857491     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CNNA.2002.1035107     Document Type: Conference Paper

References (7)

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