-
1
-
-
0004038844
-
-
P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, Eds.; Boston, MA: Kluwer
-
P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, Eds., Flash Memories. Boston, MA: Kluwer, 1999.
-
(1999)
Flash Memories
-
-
-
2
-
-
0036575326
-
Effects of floating-gate interference on NAND flash memory cell operation
-
May
-
J. D. Lee, S.-H. Hur, and J.-D. Choi, "Effects of floating-gate interference on NAND flash memory cell operation," IEEE Electron Device Lett., vol. 23, pp. 264-266, May 2002.
-
(2002)
IEEE Electron Device Lett.
, vol.23
, pp. 264-266
-
-
Lee, J.D.1
Hur, S.-H.2
Choi, J.-D.3
-
3
-
-
4244108820
-
2 cell size
-
2 cell size," in IEDM Tech. Dig., 2001, pp. 2.4.1-2.4.4.
-
(2001)
IEDM Tech. Dig.
-
-
Song, Y.H.1
Han, J.I.2
Kim, J.W.3
Park, J.H.4
Kim, S.Y.5
Kwon, D.W.6
Park, Y.M.7
Lee, J.S.8
Lee, W.K.9
Lee, D.Y.10
Kang, M.S.11
Kim, J.12
Suh, K.D.13
-
4
-
-
0028735413
-
The solution of over-erase problem controlling poly-Si grain size-modified scaling principles for flash memory
-
S. Muramatsu, T. Kubota, N. Nishio, H. Shirai, M. Matsuo, N. Kodama, M. Horikawa, S. Saito, K. Arai, and T. Okazawa, "The solution of over-erase problem controlling poly-Si grain size-modified scaling principles for flash memory," in IEDM Tech. Dig., 1994, pp. 847-850.
-
(1994)
IEDM Tech. Dig.
, pp. 847-850
-
-
Muramatsu, S.1
Kubota, T.2
Nishio, N.3
Shirai, H.4
Matsuo, M.5
Kodama, N.6
Horikawa, M.7
Saito, S.8
Arai, K.9
Okazawa, T.10
-
5
-
-
0000906920
-
On the origin of the dispersion of erased threshold voltages in flash EEPROM memory cells
-
May
-
D. Esseni and B. Ricco, "On the origin of the dispersion of erased threshold voltages in flash EEPROM memory cells," IEEE Trans. Electron Devices, vol. 47, pp. 1120-1123, May 2000.
-
(2000)
IEEE Trans. Electron Devices
, vol.47
, pp. 1120-1123
-
-
Esseni, D.1
Ricco, B.2
-
6
-
-
0020294382
-
Cell model for EEPROM floating gate memories
-
P. I. Suciu, B. P. Cox, D. D. Rinerson, and S. F. Cagnina, "Cell model for EEPROM floating gate memories," in IEDM Tech. Dig., 1982, pp. 737-740.
-
(1982)
IEDM Tech. Dig.
, pp. 737-740
-
-
Suciu, P.I.1
Cox, B.P.2
Rinerson, D.D.3
Cagnina, S.F.4
-
7
-
-
0021505267
-
Modeling of write/erase and charge retention characteristics of floating gate EEPROM devices
-
A. Bhattacharyya, "Modeling of write/erase and charge retention characteristics of floating gate EEPROM devices," Solid-State Electron., vol. 27, no. 10, pp. 899-906, 1984.
-
(1984)
Solid-State Electron.
, vol.27
, Issue.10
, pp. 899-906
-
-
Bhattacharyya, A.1
-
8
-
-
0022737546
-
Analysis and modeling of floating-gate EEPROM cells
-
June
-
A. Kolodny, S. T. K. Nieh, B. Eitan, and J. Shappir, "Analysis and modeling of floating-gate EEPROM cells," IEEE Trans. Electron Devices, vol. ED-33, pp. 835-844, June 1986.
-
(1986)
IEEE Trans. Electron Devices
, vol.ED-33
, pp. 835-844
-
-
Kolodny, A.1
Nieh, S.T.K.2
Eitan, B.3
Shappir, J.4
-
9
-
-
13744263481
-
-
Avant! Corp., Fremont, CA
-
MEDICI User's Guide, Avant! Corp., Fremont, CA.
-
MEDICI User's Guide
-
-
|