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Volumn 5, Issue , 2003, Pages
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On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTATIONAL METHODS;
CRYPTOGRAPHY;
DATA COMMUNICATION SYSTEMS;
STANDARDS;
HASH FUNCTIONS;
VLSI CIRCUITS;
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EID: 0037744606
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (88)
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References (11)
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