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Volumn 5, Issue , 2003, Pages

Variable sampling window flip-flop for low-power application

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POWER SYSTEMS; FEEDBACK; SWITCHING;

EID: 0037744587     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (3)
  • 2
    • 0034430928 scopus 로고    scopus 로고
    • Conditional-capture flip-flop technique for statistical power reduction
    • Feb.
    • B.-S. Kong, S.-S. Kim, and Y.-H. Jun, "Conditional-capture flip-flop technique for statistical power reduction," IEEE ISSCC, pp. 290-291, Feb. 2000.
    • (2000) IEEE ISSCC , pp. 290-291
    • Kong, B.-S.1    Kim, S.-S.2    Jun, Y.-H.3
  • 3
    • 0031339590 scopus 로고    scopus 로고
    • A reduced clock-swing flip-flop (RCSFF) for 63% power reduction
    • June
    • H. Kawaguchi, and T. Sakurai, "A reduced clock-swing flip-flop (RCSFF) for 63% power reduction," IEEE VLSI Symp., pp. 97-98, June 1997.
    • (1997) IEEE VLSI Symp. , pp. 97-98
    • Kawaguchi, H.1    Sakurai, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.